clo c k generators - s m t 1 HMC1031MS8E v00.0312 clock generator with integer-n pll 0.1 - 500 mhz general description features functional diagram t ogether with an external loop flter and a vcx o , the hmc1031m s 8 e forms a complete clock generator solution targeted at low frequency jitter-cleaner and reference clock generation applications. t he hmc1031m s 8 e features a low power integer- n divider supporting divide ratios of 1/5/10, that is controlled via external hardware pins and requires no serial port. t he integrated phase detector and charge pump are capable of operating up to 140 mhz, and a maximum vcx o input of 500 mhz ensure frequency compliance with a wide variety of system clocks and vcx o s. a dditional features include integrated l ock detect indicator available on a dedicated hardware pin, and a built-in power down mode. t he hmc1031m s 8 e is housed in a 8 lead m s 8 e s m t package. l ow current consumption: <2 m a t ypical high phase frequency detector r ate: 140 mhz hardware pin programmable clock multiplication r atios: x1/ x5/ x10 l ock detect indicator power down mode (0.7 a typical) 8 l ead m s 8 e package: 4.8 mm x 3.0 mm typical applications ? low jitter clock generation ? low bandwidth jitter attenuation ? low frequency pll ? frequency translation ? ocxo frequency multiplier ? phase lock clean high frequency references to 10mhz equipment for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
clo c k generators - s m t 2 HMC1031MS8E v00.0312 clock generator with integer-n pll 0.1 - 500 mhz electrical specifcations t a = +25 c, vcc = 3.3 v, unless o therwise s pecifed. parameter conditions min t yp max units power s upply voltage 2.7 3.3 3.5 v o perating t emperature -40 27 85 c r eference frequency e xternally a c coupled [1] 140 mhz vc o frequency 500 mhz charge pump current 50 a input voltage s wing ( r eference & vc o inputs) [2] e xernally a c coupled to the chip. 0.1 3.5 vpp ref, vco input dc bias 0.5*vcc approximately 1.65 v input duty cycle 40 60 % charge pump o utput r ange 0.2 to vcc - 0.4 v t ypically [3] input impedance at 50 mhz a pplicable to re f an vc o input pins. 3600 || 4 ?||pf divide r atios vc o /vcx o feedback divider 1/5/10 phase n oise [4] floor figure of merit flicker figure of merit divide-by 10 -212 -254 -208 -252 -204 -248 dbc/hz dbc/hz flicker n oise at f offset pn fick = flicker f o m +20log(f vcxo ) -10log(f offset ) dbc/hz phase n oise floor at f vcxo with f pd pn foor = floor f o m + 10log(f pd ) +20log(f vcxo /f pd ) dbc/hz s upply current [5] 100 mhz re f=vcx o , 3.3 v vcc 1.95 ma power down current [6] [d0,d1 = 00] 3.0 v vcc, 25 c 3.3 v vcc, 85 c 3.6 v vcc, 85c 0.05 0.8 1 ua ua ua l ock detect o utput current cm os o utput l evel 3 ma [1] t he lower limit of operation is limited by off-chip a c coupling. t he size of the a c coupling should be chosen to have insignifcant impedance relative to the 3.6k o hm input impedance of the part, and any termination impedances on the evaluation board (50 o hm by default). [2] re f and vc o inputs should be a c coupled to hmc1031m s 8 e . peak input level should not exceed vcc+0.4 v with respect to g n d. [3] p ll may lock in the voltage range of 0.2 to vcc - 0.4 v. however, the charge pump gain may be reduced. s ee figure 9 cp compliance [4] s ee figure 15, 16 for addional flicker f o m and floor f o m data. [5] see figure 10 for additional supply current data. base frequency 100mhz, base vcc: 3.3v, 0.8 to 1ma/v, base pfd current: 1.8 ma, 8 a/ mhz base div current: 1.15ma, 15 a/mhz. for example, the device current for a 10 mhz ref and 50 mhz vco at 3.0 v vcc can be calculated as pfd current delta = (10-100)*8e-6 = -0.72, div current delta = (50-100)*15e-6=-0.75 m a , device current = (1.8-0.72)+(1.15-0.75)=1.48 m a at 3.3v vcc a t 3 v vcc device current would be approx: 1.48 - 0.85e-3*(3.3-3.0) = 1.225 m a [6] in power down mode, the re f/vc o inputs and charge pump outputs are tri-stated. t he power down leakage current is measured without any signal applied to hmc1031m s 8 e . for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
clo c k generators - s m t 3 HMC1031MS8E v00.0312 clock generator with integer-n pll 0.1 - 500 mhz figure 1. 10 mhz to 100 mhz with noisy reference phase noise [1 ] figure 2. 10mhz to 50mhz with noisy reference phase noise [1] figure 4. typical close loop phase noise, HMC1031MS8E as jitter attenuator, loop bandwidth 100 hz [1] figure 3. 10mhz to 100mhz with very noisy reference phase noise [1] figure 5. phase error during lock time for div 5, 10 mhz in,50 mhz out, loop bandwidth 100 hz [1] figure 6. frequency error during lock time for div 5, 10 mhz in,50 mhz out, loop bandwidth 100 hz [1] [1] l oop filter value: c1 4.7 f, r 2 1.2 k ?, c2 62 f for l oop filter bandwidth 8 hz, vcx o : crystek cvhd-950 100 mhz [2] loop filter value: c1 220 nf, r2 3.3 k?, c2 2.2 f for loop filter bandwidth 50 hz, vcxo: bliley v105acacb 50 mhz [3] l oop filter value r efer to l oop filter confguration t able n o 1. vcx o : crystek cvhd-950 100mhz [4] l oop filter value r efer to l oop filter confguration t able n o 2. s imulated data is generated from hittite p ll design s oftware. typical performance characteristics t a = +25 c, vcc = 3.3 v, unless o therwise s pecifed. -180 -160 -140 -120 -100 -80 -60 -40 10 100 1000 10000 100000 1000000 100 mhz vcxo locked with tiny pll 10 mhz noisy ref offset (hz) phase noise (dbc/hz) 12khz - 20mhz integrated jitter hmc1031/vcxo: 55 fsec 10mhz input: 4 psec -180 -160 -140 -120 -100 -80 -60 -40 -20 10 100 1000 10000 100000 1000000 50 mhz vcxo locked with tiny pll 10 mhz noisy ref open loop vcxo phase noise offset (hz) phase noise (dbc/hz) 12khz to 20mhz integrated jitter hmc1031/vcxo: 190 fsec 10mhz iinput: 4 psec -180 -160 -140 -120 -100 -80 -60 -40 -20 1 10 100 1000 10000 100000 1000000 open loop vcxo phase noise 10 mhz very noisy ref 100 mhz vcxo locked with tiny pll offset (hz) phase noise (dbc/hz) 12khz to 20mhz integrated jitter hmc1031/vcxo: 57.8 fsec 10mhz iinput: 16.2 psec -180 -160 -140 -120 -100 -80 -60 -40 -20 1 10 10 2 10 3 10 4 10 5 10 6 10 7 10 8 p sim model sim vcxo response sim pll contribution sim reference response total measured phase noise free running bliley 50mhz 10 mhz noisy reference offset (hz) phase noise (dbc/hz) 12khz to 20mhz integrated jitter hmc1031/vcxo: 212 fsec -200 -100 0 100 200 0 10 20 30 40 50 60 70 80 phase error (degree) time (msec) -2000 -1500 -1000 -500 0 500 1000 0 10 20 30 40 50 60 70 80 frequency error (hz) time (msec) for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
clo c k generators - s m t 4 HMC1031MS8E v00.0312 clock generator with integer-n pll 0.1 - 500 mhz figure 7. typical charge pump output source and sink current vs. output voltage figure 8. HMC1031MS8E current vs. different confg 1 1.5 2 2.5 3 2.6 2.8 3 3.2 3.4 3.6 -40 c 27 c 85 c current (ma) supply voltage (v) div 1, ref/vcxo = 122.88mhz div 5, ref =10 mhz, vcxo = 150 mhz div 10, ref =10 mhz, vcxo = 100 mhz figure 9. HMC1031MS8E ref input sensitivity vs. frequency [1] figure 10. HMC1031MS8E ref input sensitivity vs. frequency [4] -10 0 10 20 30 40 50 60 0 0.5 1 1.5 2 2.5 3 3.5 4 source/sink current (ua) charge pump output voltage (v) i-sink i-source 2.7 v vcc i-source 3.5 v vcc i-source 3.0 v vcc i-source 3.3 v vcc -30 -20 -10 0 10 50 100 150 200 input power (dbm) input frequency (mhz) recommend region of operation 0.01 0.1 1 10 50 100 150 200 input voltage swing (vpp) input frequency (mhz) recommend region of operation [5] maximum frequency is guaranteed in the recommended region of operation across temperature and process variation. figure 11. HMC1031MS8E vco input sensitivity vs. frequency [5] figure 12. HMC1031MS8E vco input sensitivity vs. frequency [5] -30 -20 -10 0 10 80 160 240 320 400 480 560 input power (dbm) input frequency (mhz) recommend region of operation 0.01 0.1 1 10 80 160 240 320 400 480 560 input voltage swing (vpp) input frequency (mhz) recommend region of operation for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
clo c k generators - s m t 5 HMC1031MS8E v00.0312 clock generator with integer-n pll 0.1 - 500 mhz figure 13. HMC1031MS8E flicker fom figure 14. HMC1031MS8E floor fom -260 -258 -256 -254 -252 -250 -248 -246 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 -40 c 27 c 85 c flicker fom (dbc/hz) supply voltage (v) -215 -210 -205 -200 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 -40 c 27 c 85 c floor fom (dbc/hz) supply voltage (v) for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
clo c k generators - s m t 6 HMC1031MS8E v00.0312 clock generator with integer-n pll 0.1 - 500 mhz outline drawing part n umber package body material l ead finish m sl r ating package marking [1] hmc1031m s8 e r oh s -compliant l ow s tress injection molded plastic 100% matte s n m sl 1 [2] 1031 xxxx [1] 4-digit lot number xxxx [2] max peak refow temperature of 260 c package information ele c trostat ic sens i t iv e de vic e observe handling precautions absolute maximum ratings vcc to g n d - 0.3 v to 3.6 v d0, d1 pins to g n d -0.3 v to 3.6 v maximum re f input voltage vcc + 0.4 v maximum vc o input voltage vcc + 0.4 v maximum junction temperature +125 c s torage t emperature -65 to +150 c o perating t emperature -40 to +85 c t hermal r esistance 0.2 c/mw r efow s oldering peak t emperature t ime at peak t emperature +260 c 40 seconds esd sensitivity (hbm) class 2 s tresses above those listed under a bsolute maximum r atings may cause permanent damage to the device. t his is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specifcation is not implied. e xposure to absolute maximum rating conditions for extended periods may affect device reliability. t he absolute maximum ratings apply individually only and not in combination. notes : 1. package body material: low stress injection molded p lastic silic a and silicon impre g nate d. 2. lead material: copper alloy 3. lea d p latin g: 100% m atte tin 4. dimensions are in inches [millim eters]. 5. dimension does not include moldf lash o f 0.15mm per side. 6. dimension does not include moldf lash of 0.25mm per side. 7. all ground leads must be soldered to pcb rf ground. for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
clo c k generators - s m t 7 HMC1031MS8E v00.0312 clock generator with integer-n pll 0.1 - 500 mhz pin n umber function description interface s chematic 1 vcc s upply voltage t ypical +3.3 v 2 re fi n r eference input, externally a c coupled reference frequency input 3 lk d o p l ock detect output, cm os drive 4, 5 d0, d1 cm os inputs used to specify integer- n division ratio 6 vc o i n vc o input, a c coupled vc o /vcx o input 7 cp charge pump output 8 g nd pin descriptions for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
clo c k generators - s m t 8 HMC1031MS8E v00.0312 clock generator with integer-n pll 0.1 - 500 mhz evaluation pcb evaluation order information a sufficient number of via holes should be used to connect the top and bottom ground planes. t he evaluation circuit board shown is available from hittite upon request. item contents part n umber evaluation pcb only HMC1031MS8E evaluation pcb e v al 01-hmc1031m s8 e for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
clo c k generators - s m t 9 HMC1031MS8E v00.0312 clock generator with integer-n pll 0.1 - 500 mhz n o. fref [mhz] fvco [mhz] div bw [hz] c8 r7 c9 1 10 100 10 10 220 nf 7. 5 k ? 4.7 uf 2 10 50 5 100 100 nf 5.6 k? 1 uf 3 10 50 5 2k 300 pf 100 k? 3.9 nf to view the eval pcb schematic please visit www.hittite.com and choose HMC1031MS8E from the search by part number pull down menu. evaluation pcb schematic nc depop r11 depop c11 nc xtal j6 12 c27 0.0033uf c7 0.0033uf 130-00139-00 sch, customer evaluation 02/19/2011 c 11 v.vaduva HMC1031MS8E b cp111906 ----- production rel ease d. aceval 11/17/ 2011 ---- cp112108 14-03-2012_13:27 02/06/2012 v. vaduva change per cp112108 c 20 alpha rd chelmsford, ma 01824 hittite microwave corporation a b notice of proprietary property: this document and the information contained in it are the proprietary property of hittite micro wave corporation. it may not be copied or used in any manner nor may any of the information in or upon it be used for any purpose without the expressed written consent of an authorized agent of hittite microwave corporation. a b 4321 of 321 drawn by date code id no. size rev 1cn88 revisions title drawing #: project c sheet rev ecn# zone name date description c c d d 5 6 5 6 4 nc nc nc nc nc r3 100k r6 51 r4 100k depop r5 c4 0.1uf r30 10k c25 0.01uf c14 0.1uf c12 0.1uf c13 0.1uf c3 0.1uf 3v depop c1 c2 0.47uf c17 0.1uf hmc860lp3e u2 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 vdd en ref hv3 rd3 rd4 hv4 vr4 vr3 vr2 vr1 hv2 rd2 rd1 hv1 gnd band gap c21 1uf c24 4.7uf c23 0.1uf r22 depop r26 depop r27 depop r29 depop r28 depop c20 0.1uf c22 0.1uf c16 depop j7 12 depop y1 10.000mhz 31 4 2 gnd vdd en out nc 50.000mhz y3 5 1 2 3 6 4 out vdd gnd en vcrtl nc r21 depop depop c10 j5 12 vcovcc c15 depop r18 0.2 r19 0 vcovcc xtal j9 ssw-106-01-t-d 9 11 1 3 5 7 2 4 6 8 10 12 0 r2 0 r1 3v c26 0.1uf r25 0.2 r12 51 depop 122.88 mhz y4 4 1 3 2 gnd fout vc vdd depop c6 depop r16 r23 16 r17 16 c9 0.27uf r10 depop r9 0 r20 0 3v c19 depop r8 0 c8 0.022uf depop tp2 r31 1.1k depop c5 j4 j8 tp6 tp5 tp8 tp3 depop tp4 depop tp7 r7 22k tp1 depop y2 50.000mhz depop 4 1 3 2 gnd fout vc vdd j3 c18 0.1uf r24 16 HMC1031MS8E u1 8 7 6 5 4 3 2 1 vcc refin lkdop d0 d1 vcoi n cp gnd 1/n lkd pfd/cp d1 led ? sw1 tda02h0sb1 4 3 1 2 3v d1 ld vr2 vr1 vr3 d0 ld +5.5v gnd pll 3v xtal vcovcc 11 0 1 01 00 divider control divide by 10 divide by 5 divide by 1 power down d1 d0 header to usb board vtune ext_vco ext_ref attenuator 50 ohm co-planar trace tcxo vcxo loop fi lter HMC1031MS8E pins [set by sw1 in evaluation pcb schematic] p ll feedback division r atio ( n ) d0 d1 0 0 power down mode 1 0 1 0 1 5 1 1 10 frequency multiplication truth table loop filter confguration table for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
clo c k generators - s m t 10 HMC1031MS8E v00.0312 clock generator with integer-n pll 0.1 - 500 mhz HMC1031MS8E application information figure 15. HMC1031MS8E application diagram jitter attenuation in some cases, reference clocks to the system may come from external noisy sources with high jitter. t he hmc1031m s 8 e may be used to attenuate this incoming jitter and distribute a clean clock in the system. in such a scheme, a narrow loop flter is selected for the hmc1031m s 8 e . t he device frequency locks to the external vcx o but the reference jitter is attenuated as defned by the set loop flter bandwidth. t he fnal output frequency and phase noise characteristics outside the loop bandwidth is defned by the phase noise characteristics of the vcx o used. a low jitter clock reference yields better clocking performance, better lo performance of r f p ll vc o s, and improves the snr performance of data converters ( a dc/d a c). frequency translation quite often, the reference clock in a t est & measurement or a communications system is a high accuracy o cx o ( o ven controlled crystal o scillator) with excellent long-term stability. t he hmc1031m s 8 e may fnd applications when the o cx o frequency needs to be multiplied up to a higher rate to drive the primary clock inputs in a system. t he device offers a very low power, small package and high performance method to multiply its incoming frequency in x1, x5 and x10 rates. s uch multiplication is needed because the higher reference clocks improve phase n oise, a dc/d a c snr, clock generator jitter and phy bers. in this scheme, the HMC1031MS8E may be connected to an external low cost vcx o (e.g. at 50mhz or 100mhz), and lock this external vcx o to the excellent long-term stability of the o cx o . loop bandwidths with HMC1031MS8E in typical jitter attenuation applications, an incoming reference clock is frequency locked with a narrow p ll l oop bandwidth such that its incoming noise is fltered out by the pll and vcxo combination. the out of band phase noise of the p ll follows the vcx o that its locked to. a narrow p ll loop bandwidth ensures that the output jitter is determined by the vcx o (or any other type of high quality factor vc o ) and not affected by the spectral noise of the incoming clock beyond the set loop bandwidth. considering that the hmc1031m s 8 e will be used in narrow loop flter bandwidth confgurations, the device is designed to have a low charge pump current of 50u a . t his architecture offers advantages in low power consumption and loop flter design. t ypically, narrow loop flter bandwidths require large flter capacitors. t hanks to the low charge pump current design of the hmc1031m s 8 e , smaller loop flter capacitor sizes may be used to implement narrow loop flters. it should be kept in mind that the hmc1031m s 8 e is designed to operate in only a few khz loop bandwidths in its widest-loop bandwidth confguration. using vco/vcxos with negative tuning slope in its normal confguration, hmc1031m s 8 e will work with any vc o /vcx o that has a positive tuning slope. for any vc o /vcx o with negative tuning slope i.e where frequency decreases with increasing tuning voltage, the loop flter a c ground should be connected to vcc instead of g n d. for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
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